Driving circuit suppressing peak value of charging current from

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307270, 307579, 307585, 307578, 307443, H03K 1712, H03K 1704, H03K 19017, H03K 1713

Patent

active

046282181

ABSTRACT:
A buffer circuit, which supplies current to a capacitive load, has a first circuit for reducing the power supply charging current to the capacitive load during switching intervals. The first circuit includes a charge storage device precharged between inverter switching intervals to produce at least a portion of the load charging current during the switching intervals. A second circuit includes a switching element connected between the power supply and the capacitive load to electrically connect the power supply through the second circuit to the load at a selected time in the switching interval to supplement the charging current produced by the charge storage device.

REFERENCES:
patent: T955006 (1977-02-01), Cavaliere et al.
patent: 4042838 (1977-08-01), Street et al.
patent: 4384216 (1983-05-01), Pricer
patent: 4424456 (1984-01-01), Shiraki et al.
patent: 4477735 (1984-10-01), Gollinger et al.
patent: 4488066 (1984-12-01), Shoji
patent: 4499387 (1985-02-01), Konishi

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