Process for suppressing boron penetration in BF.sub.2 .sup.+ -im

Details Process for suppressing boron penetration in BF.sub.2 .sup.+ -im Process for suppressing boron penetration in BF.sub.2 .sup.+ -im

1995-11-24

1997-05-13

Niebling, John

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

257411, 438515, 438762, 438923, H01L 21265

Patent

active

056292210

ABSTRACT:
A process for suppressing boron penetration in BF.sub.2.sup.+ -implanted P.sup.+ -poly-Si gates provides a nitrided layer between the oxide layer and poly-Si through use of inductively-coupled nitrogen plasma (ICNP) to form an energy barrier which the boron ion can hardly penetrate. The process includes the steps of growing an oxide layer by washing the silicon, introducing nitrogen gas into the inductively-coupled plasma (ICP) system and carrying out nitrogen plasma surface treatment at RF power of 150w to 250w; stacking polysilicon of 3000 .ANG. low pressure chemical vapor deposition (LPCVD) system; implanting BF.sub.2.sup.+ at 5.times.10.sup.15 atom/cm.sup.2 and 50 KeV; removing the surface oxide layer by annealing at 900.degree. C. for a time; and plating Al to form a MOS capacitor and measuring electric properties.

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