Patent
1991-05-28
1992-09-08
Larkins, William D.
357 41, 357 67, 357 71, H01L 2711, H01L 23532
Patent
active
051463091
ABSTRACT:
A method for fabricating integrated circuits is used to improve contacts between polycrystalline interconnect and underlying polycrystalline or monocrystalline silicon regions. After contact openings are formed, a layer of titanium is deposited over the integrated circuit. The titanium is reacted in nitrogen to form a silicide layer only in the openings. Titanium nitride and unreacted titanium are then removed, and a layer of polycrystalline silicon deposited and patterned. The silicide layer between the polycrystalline interconnect and the underlying silicon ensures that a high quality contact is formed.
REFERENCES:
patent: 4569122 (1986-02-01), Chan
patent: 4901134 (1990-02-01), Misawa et al.
patent: 4903096 (1990-02-01), Masuoka et al.
Chen Fusen E.
Liou Fu-Tai
Spinner Charles R.
Hill Kenneth C.
Jorgenson Lisa K.
Larkins William D.
Robinson Richard K.
SGS-Thomson Microelectronics Inc.
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