Boots – shoes – and leggings
Patent
1996-11-14
1999-06-29
Ngo, Chuong Dinh
Boots, shoes, and leggings
G06F 738
Patent
active
059177390
ABSTRACT:
The n-bit average of four signed or unsigned n-bit integer operands (A, B, C and D) rounded towards zero as prescribed in the MPEG standard is calculated in one instruction cycle by appending two bits to a left side of each of the operands to provide four n+2 bit extended operands, summing the extended operands to provide an n+2 bit sum, removing the two least significant bits of the n+2 bit sum to provide an n-bit sum, and incrementing the n-bit sum as appropriate. An append circuit (302) appends two bits to the left sides of the operands, and the extended operands are coupled to an adder circuit (306) that includes adder logic (308) and an n-bit carry lookahead adder (310). The adder logic (308) provides the two least significant bits of the sum of the extended operands, along with n partial sum bits and n partial carry bits to the adder (310). The adder (310) provides a sum output, representing the n most significant bits of the sum of the extended operands, and a sum-plus-one output representing the sum output incremented by one. A multiplexer (314) under control of a control circuit (312) selects one of the sum and sum-plus-one outputs as the n-bit average based on inspection of the two least significant bits and the most significant bit of the sum of the extended operands, and a mode signal indicative of whether the operands are signed or unsigned values.
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Ngo Chuong Dinh
Samsung Electronics Co,. Ltd.
Sigmond David M.
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