Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1994-09-07
1995-12-05
Ngo, Ngan V.
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257372, 257373, 257901, H01L 2976, H01L 2994, H01L 31062
Patent
active
054731836
ABSTRACT:
The present invention is directed to a CMOS inverter in which an N-FET (Qn) formed of an N-type source region (2S), a drain region (2D) and a gate electrode (2G) and a P-FET (Qp) formed of a P-type source region (3S), a drain region (3D) and a gate electrode (3G) are formed on an N-type silicon substrate (1n). A first well region (4p) is formed under the N-FET (Qn) and P-FET (Qp). Further, an N-type well region (5n) is formed on the P-FET (Qp) within the first well region (4p). Thus, an influence exerted by a back-gate effect from the substrate can be prevented completely, whereby a phase displacement relative to a pulse response to a CMOS peripheral logic circuit and a malfunction can be avoided.
REFERENCES:
patent: 3865654 (1975-02-01), Chang et al.
patent: 4931880 (1990-06-01), Yamada
patent: 5198880 (1993-03-01), Taguchi et al.
patent: 5336913 (1994-08-01), Fujita et al.
patent: 5373476 (1994-12-01), Jeon
Ngo Ngan V.
Sony Corporation
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