Semiconductor device having a multilevel metallization

Details Semiconductor device having a multilevel metallization Semiconductor device having a multilevel metallization

1994-11-30

1995-12-26

Mintel, William

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257499, 257510, 257524, 257776, H01L 2348

Patent

active

054790387

ABSTRACT:
Upper and lower metallizations are formed on a semiconductor substrate so as to prevent the upper metallization from being inferior wherein the semiconductor substrate includes a plurality of element forming regions, a plurality of isolation insulating regions for surrounding said element forming regions, and a supporter region extending between the isolation insulating regions. The lower metallization is formed on the supporter region and the upper metallization is formed to extend from one element forming region to another element forming regions while striding over the lower metallization not to cross the region where the lower metallization adjoins the isolation insulating regions. The lower metallization may be formed from one element forming region to another element forming regions while the upper metallization is formed to stride over the lower metallization.

REFERENCES:
patent: 4361846 (1982-11-01), Tsukuda
patent: 5057895 (1991-10-01), Beasom

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