Nonvolatile semiconductor device to erase with a varying potenti

Details Nonvolatile semiconductor device to erase with a varying potenti Nonvolatile semiconductor device to erase with a varying potenti

1993-06-07

1995-12-12

Loke, Steven H.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257314, 257319, 257320, 36518907, 365191, 365218, H01L 29788, H01L 2976, G11C 1134, G11C 700

Patent

active

054752493

ABSTRACT:
Erasing operation can be carried out by applying a given potential difference between the control gate electrodes and the source regions in memory transistors 1a-1d by a potential difference setting section 30. Verifying operation can be accomplished by detecting the threshold voltages of the memory transistors 1a-1d by a verify circuit 8. The potential difference setting section 30 can respond to Detect signals from the verify circuit 8, that is, to the threshold voltages of the memory transistors to control the application time of potential difference or the magnitude of potential difference. In such a manner, the overerasing can effectively be prevented and the erasing time can be optimized.

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patent: 4949309 (1990-08-01), Rao
patent: 4956816 (1991-09-01), Atsumi et al.
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patent: 5185718 (1993-02-01), Rinerson et al.
patent: 5241507 (1993-08-01), Fong
patent: 5247346 (1993-09-01), Hazani
patent: 5247478 (1993-09-01), Gupta et al.
patent: 5274599 (1993-12-01), Ema
patent: 5287317 (1994-02-01), Kobayashi et al.

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