Electronic digital logic circuitry – Interface – Supply voltage level shifting
Patent
1997-09-16
2000-07-25
Tokar, Michael
Electronic digital logic circuitry
Interface
Supply voltage level shifting
326 68, 326 58, H03K 190175
Patent
active
060940670
ABSTRACT:
An output buffer circuit is provided which comprises a level conversion circuit having a first conversion circuit for converting a control signal and an output signal to "H" and "L" signals in a first source system and a second conversion circuit for converting these into "H" and "L" signals in a second source system, a tristate control type input/output control circuit for computing the "H" and "L" signals outputted from the second conversion circuit in the second source system, and a push-pull circuit having MOS transistors Q13a and Q14, which is activated in the second source system in response to the "H" and "L" signals so as to select a tristate and output it as an input/output signal.
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Chang Daniel D.
Mitsubishi Denki & Kabushiki Kaisha
Tokar Michael
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