Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Patent
1996-06-05
1999-11-16
Kim, Kenneth S.
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output data buffering
710 56, 710128, G06F 1314
Patent
active
059875399
ABSTRACT:
A bridge circuit for coupling a first bus to a second bus includes a read buffer adapted to store read data and control logic. At least a portion of the read data includes prefetch data, and the read data is associated with a requesting device coupled to one of the first and second buses. The control logic is adapted to identify a write request having a target address on one of the first and second buses, flush at least a portion of the prefetch data in response to the target address corresponding to the requesting device, and transfer the write request to the requesting device independent of the read buffer. The write request is useful for signaling the requesting device that the read data is no longer required.
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Compaq Computer Corporation
Kim Kenneth S.
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