Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Patent
1998-06-02
1999-07-20
Nguyen, Tuan H.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
438157, 438164, H01L 2186
Patent
active
059266996
ABSTRACT:
A method of fabricating a semiconductor device comprises the steps of sequentially forming a first gate electrode and an insulating film over a transparent support substrate, forming a through-hole in the insulating film, forming a semiconductor single crystal silicon thin film over the transparent support substrate by epitaxial growth in the through-hole of the insulating film, forming a transistor element having a channel region formed in the semiconductor single crystal silicon thin film, and forming a second gate electrode over and electrically insulated from the channel region of the transistor element.
REFERENCES:
patent: 4609930 (1986-09-01), Yamazaki
patent: 4748485 (1988-05-01), Vasudev
patent: 4751196 (1988-06-01), Pennell et al.
patent: 4759610 (1988-07-01), Yanagisawa
patent: 4821092 (1989-04-01), Noguchi
patent: 4871234 (1989-10-01), Suzuki
patent: 4875086 (1989-10-01), Malhi et al.
patent: 4984033 (1991-01-01), Ishizu et al.
patent: 5071785 (1991-12-01), Nakazato et al.
patent: 5075237 (1991-12-01), Wu
patent: 5198379 (1993-03-01), Adan
patent: 5759878 (1998-06-01), Hayashi et al.
Electronics Letters, vol. 25, No. 15, Jul. 20 1989, pp. 1009-1011, R.P. Zing et al., "High-Quality Dual-Gate PMOS Devices In Local Overgrowth (LOG)".
R.P. Zing et al., IEEE Electron Dev. Lett. 11(1)(1990)9 ". . . Stacked CMOS Inverter", Jan., 1990.
R.P. Zingg et al., IEEE Trans. Electron Dev., 37(6)(1990)1452 ". . . Stacked MOS . . . by localized Silicon" Jun., 1990.
K. Ishii et al., Jpn. J. Appl. Phys., 29(4)(1990)L521 ". . . XMOS Transistor Using Lateral Solid Phase Epitaxy", Apr. 1990.
Hayashi Yutaka
Kamiya Masaaki
Kojima Yoshikazu
Takasu Hiroaki
Agency of Industrial Science and Technology
Christianson Keith
Nguyen Tuan H.
Seiko Instruments Inc.
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