Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1997-09-11
1999-07-20
Pan, Daniel H.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
395678, 711202, G06F 932, G06F 1206
Patent
active
059266465
ABSTRACT:
A microprocessor includes an expanded set of registers in addition to the architected set of registers specified by the microprocessor architecture employed by the microprocessor. The expanded set of registers are memory-mapped within the context of the program being executed. Upon a context switch, the microprocessor saves the state of the expanded registers to the corresponding memory locations. An application program may make use of the expanded registers by assigning the most-often used operands in the program to the set of memory locations corresponding to the expanded registers. The application programmer may than code instructions which access these operands with register identifiers corresponding to the expanded registers. In one embodiment, the microprocessor implements a portion of the expanded registers instead of the entire set of expanded registers. The implemented portion of the expanded registers are accessed as register accesses, while the unimplemented portion are converted to memory accesses. The decode unit within the microprocessor may be configured to convert instructions which are coded to access the unimplemented expanded registers into memory operations to access the corresponding memory location.
REFERENCES:
patent: 4829425 (1989-05-01), Bain, Jr. et al.
patent: 5384724 (1995-01-01), Jagini
patent: 5727211 (1998-03-01), Gulsen
Intel, Pentium.TM. Processor User's Manual, vol. 3: "Architectures and Programming Manual," Chapter 13, "Protected-Mode Multitasking," pp. 13-1 through 13-15, 1993.
Mahalingaiah Rupaka
McMinn Brian D.
Pickett James K.
Advanced Micro Devices , Inc.
Kivlin B. Noel
Merkel Lawrence J.
Pan Daniel H.
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