Semiconductor memory device having booster supplying step-up vol

Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator

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36518905, G11C 700

Patent

active

058810005

ABSTRACT:
A semiconductor synchronous dynamic random access memory device supplies a series of data bits to an external device through a burst access; a first boosting circuit produces a first boosted voltage from a pulse signal internally generated by a ring oscillator, a second boosting circuit produces a second boosted voltage from a system clock, and the output node of the first boosting circuit is electrically connected to the output node of the second boosting circuit; while an output circuit is producing an output data signal from read-out data bits in synchronism with the system clock during the burst access, the second boosting circuit pumps electric charge to the output circuit in synchronism with the system clock so as to stably supply the second boosted voltage, and the output circuit converts the read-out data bits to the output data signal at high-speed.

REFERENCES:
patent: 5521871 (1996-05-01), Choi
patent: 5528538 (1996-06-01), Sakuta et al.
patent: 5677889 (1997-10-01), Haraguchi et al.

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