Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1997-07-23
2000-03-28
Chang, Joni
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438672, 438681, 438687, 438688, H01L 2170
Patent
active
060431490
ABSTRACT:
A method for forming a metal line of a semiconductor device includes the steps of: forming an insulating film on a semiconductor substrate including a lower layer line; forming a via hole to partially expose the lower layer line by selectively removing the insulating film; forming a first conductivity material layer on the insulating film including the via hole; forming a plug layer by selectively removing the first conductivity material layer so that it remains only in the via hole; performing a resistance-lowering treatment on the plug layer to remove its impurities; and forming a second conductivity material layer on the insulating film including the plug layer to form an upper layer line.
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Complete planarization of via holes with aluminum by selective and nonselective chemical vapor deposition, Kazuo Tsubouchi et al, Research Institute of Electrical Communications, Tohuku University, Katahira 2-1-1, Aoba-ku, Sendai 980, Japan, pp. 1221-1223.
Chang Joni
Eaton Kurt
LG Semicon Co. Ltd.
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