Process of fabricating a semiconductor device having trench isol

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation

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438424, H01L 2176

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active

060431350

ABSTRACT:
A trench isolation is formed in a silicon substrate for defining active areas assigned to circuit components, and has an upper surface lower than a gate oxide layer grown on the adjacent active area; when the trench isolation is formed, silicon oxide is removed from the periphery of the silicon substrate defining a trench, then the surface of the silicon substrate is oxidized so that the silicon oxide deeply penetrates from the periphery into the silicon substrate, and, thereafter, insulating material fills the secondary trench defined by the silicon oxide; even through a gate electrode is patterned over the trench isolation, a pattern image for the gate electrode is exactly transferred to a photo-resist layer extending over the trench isolation, and the deeply penetrated silicon oxide prevents the channel region from concentration of electric field, thereby preventing the field effect transistor from the kinks and the inverse narrow width effect.

REFERENCES:
patent: 4857477 (1989-08-01), Kanamori
patent: 5674775 (1997-10-01), Ho et al.
patent: 5795811 (1998-08-01), Kim et al.
Perera et al., "Trench Isolation for .045 .mu. m Active Pitch and Below", IEDM Technical Digest, 1995, pp. 679-682.

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