Method of forming a semiconductor

Details Method of forming a semiconductor Method of forming a semiconductor

1997-04-30

1999-11-16

Bowers, Charles

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Insulative material deposited upon semiconductive substrate

438559, 438649, 438664, 438682, H01L 2131

Patent

active

059857684

ABSTRACT:
The present invention discloses a method of doping and preventing silicide formation in selective areas of a polysilicon gate in MOS, PMOS, NMOS or CMOS manufacturing technologies. The process includes the steps of: depositing a non-conformal dopant containing layer on the top surface of the body and the top surface of the polysilicon gate; removing a portion of the non-conformal dopant containing layer to expose the top surface of the polysilicon gate; and heating to diffuse dopant from the dopant containing layer. Silicidation is then provided by depositing a metal layer and annealing the metal layer. As a first alternative method, the heating and removing step may be reversed. As a second alternative method, after removal of the non-conformal layer, a metal layer can be deposited followed by a combination anneal of the metal layer and non-conformal dopant containing layer.

REFERENCES:
patent: 4362597 (1982-12-01), Fraser et al.
patent: 4443930 (1984-04-01), Hwang et al.
patent: 4554572 (1985-11-01), Chatterje
patent: 4641417 (1987-02-01), McDavid
patent: 4755478 (1988-07-01), Abernathe et al.
patent: 4873204 (1989-10-01), Wong et al.
patent: 4877755 (1989-10-01), Rodder
patent: 4886764 (1989-12-01), Miller et al.
patent: 4946550 (1990-08-01), Van Laarhoven
patent: 5003375 (1991-03-01), Ichikawa
patent: 5055423 (1991-10-01), Smith et al.
patent: 5121186 (1992-06-01), Wong et al.
patent: 5166771 (1992-11-01), Godinho et al.
patent: 5168076 (1992-12-01), Godinho et al.
patent: 5268330 (1993-12-01), Givens et al.
patent: 5358902 (1994-10-01), Verhaar et al.
patent: 5407837 (1995-04-01), Eklund
patent: 5569624 (1996-10-01), Weiner
IBM Technical Disclosure Bulletin/ vol. 30 No. 5, Oct. 1987/Self-Aligned Technique Employing . . . Silicide/HPSAC-A Silicided Amorphous-Silicon . . . VLSI/Ed. 34, No. 3, Mar. 1987.

Affiliated with

Also associated with

Rating

Method of forming a semiconductor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of forming a semiconductor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming a semiconductor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1324445