Fishing – trapping – and vermin destroying
Patent
1994-02-16
1996-01-09
Chaudhari, Chandra
Fishing, trapping, and vermin destroying
437 21, 437927, H01L 21786
Patent
active
054828775
ABSTRACT:
A method for making a semiconductor device having a silicon-on-insulator structure comprises the steps of: forming a pad oxide on a wafer which has a lower silicon substrate, a buried oxide layer and an upper silicon layer, forming an oxynitride region on a predetermined portion of the buried oxide layer; forming an active silicon layer to intersect the oxynitride region, and forming a cavity by wet-etching the exposed oxynitride region; forming a gate insulating layer on the surface of the exposed active silicon layer; forming a polysilicon to fill the cavity surrounding said active silicon layer and removing a predetermined portion of the doped polysilicon to form a gate electrode; and forming source and drain regions on the active silicon layer separated by the gate electrode.
REFERENCES:
patent: 4619034 (1986-10-01), Janning
patent: 5120666 (1992-06-01), Gotou
patent: 5188973 (1993-02-01), Omuro et al.
Silicon-On-Insulator "Gate-All-Around Device" by J. P. Colinge, M. H. Gao, A. Romano-Rodriquez, H. Maes, and C. Claeys, IMEC, Kapeldreef 75, 3030 Leuven, Belgium--IEEE (1990).
Chaudhari Chandra
Donohoe Charles R.
Samsung Electronics Co,. Ltd.
Whitt Stephen R.
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