MOS type semiconductor device with means to prevent parasitic bi

Details MOS type semiconductor device with means to prevent parasitic bi MOS type semiconductor device with means to prevent parasitic bi

1991-04-01

1993-03-02

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257341, 257355, 257378, 257577, 257653, H01L 2978

Patent

active

051913950

ABSTRACT:
A MOS type semiconductor device comprising a plurality of second conductivity type channel regions having a predetermined impurity density selectively formed in the surface of a first conductivity type semiconductor layer. A channel in the semiconductor layer is formed between adjacent ones of the channel regions, and source regions of the first conductivity type are selectively formed in a surface of each one of the channel regions. A well region of the second conductivity type is formed with a predetermined depth in a middle portion of each one of the plurality of channel regions and has an impurity density higher than that of the channel regions. An insulating layer is formed on the surface of the semiconductor layer, gate electrodes are formed on the insulating layer and overlaying the channel in the first conductivity type semiconductor layer, and a main electrode is formed in contact with at least one of the source region and the well region. A diffusion region of the second conductivity type is formed in the surface of the semiconductor layer with an impurity density greater than the impurity density of the well region and with a depth greater than the predetermined depth, and being ohmically connected with the main electrode.

REFERENCES:
patent: 4631564 (1986-12-01), Neilson et al.
patent: 4688323 (1987-08-01), Yoshida et al.
patent: 4819044 (1989-04-01), Murakami
patent: 4862233 (1989-08-01), Matsushita et al.
patent: 4990976 (1991-02-01), Hattori
patent: 5005061 (1991-04-01), Robb et al.
patent: 5089864 (1992-02-01), Sakurai

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