BiMOS devices and BiMOS memories

Details BiMOS devices and BiMOS memories BiMOS devices and BiMOS memories

1990-09-05

1993-03-30

Larkins, William D.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257370, 257378, 257318, H01L 2704

Patent

active

051986914

ABSTRACT:
The BiMOS devices are compact 3D devices having a coupled bipolar and MOS mechanisms integrated in one single cell. The gates cover over the bipolar regions. The bipolar regions are the tubs of the MOS mechanisms. The MOS mechanisms make the connection between the base, emitter and collector to charge and discharge the base voltage. The input applies on the gate to switch on/off the base current of the bipolar mechanism. There are P-PNP, N-NPN, N-PNP, P-NPN, PN-PNP, PN-NPN, NP-PNP and NP-NPN BiMOS devices. The BiMOS inverter, NOR, NAND logic gates are the single stage circuit having the same circuit configuration as CMOS circuits. They are made of P-PNP, N-NPN, NP-PNP and NP-NPN BiMOS devices. The digital BiMOS buffer, OR, AND logic gates are the single stage circuits made of N-PNP, P-NPN, PN-PNP and PN-NPN BiMOS devices. Furthermore, the BiMOS technologies are applied to SRAM, EPROM and EEPROM to generate the BiMOS SRAM, BiMOS EPROM and BiMOS EEPROM memory devices.

REFERENCES:
patent: 4825274 (1989-04-01), Higuchi et al.

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