Memory cell circuit

Static information storage and retrieval – Systems using particular element – Flip-flop

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365190, G11C 1100

Patent

active

048398632

ABSTRACT:
Memory cell circuit has a pair of transistors in which the gates are connected to the drains, a first and a second access transistor whose gates are connected to a read line and which are located between gate-drain connection of said pair of transistors and a pair of bit lines. The memory cell circuit also includes a third access transistor whose gate is connected to the read line and is located in the circuit between said first access transistor and the gate of said pair of transistors corresponding to the first access transistor, and a fourth access transistor whose gate is connected to the read line and is located in the circuit between said second access transistor and the gate of said pair of transistors corresponding to the second access transistor.

REFERENCES:
patent: 4103185 (1978-07-01), Denes

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