Chip identification scheme

Details Chip identification scheme Chip identification scheme

1992-11-12

1994-09-27

Thomas, Tom

Fishing, trapping, and vermin destroying

437 7, 437 8, 437924, 437935, H01L 2100

Patent

active

053507150

ABSTRACT:
A method for determining the original location of each of a multiplicity of semiconductor chips fabricated on a common wafer, including the step of applying location identification data to each of the chips, wherein the location identification data is indicative of the original location of the chip on the wafer. The applying step is preferably performed during the process for fabricating the chips on the wafer, for example, by means of using a photomask in a conventional photolithographic process to etch a location identification mark on a predetermined layer of each chip. The location identification mark can be, for example, a dot matrix pattern which signifies the original location of the chip to which it is affixed on the wafer on which it was fabricated, in accordance with a binary coding scheme. The location identification data can be detected or read from any of the chips even after they are separated from the wafer, to thereby facilitate wafer fabrication process control, by facilitating the determination of the original wafer location of any chips which are found to be defective.

REFERENCES:
patent: 5219765 (1993-06-01), Yoshida et al.

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