Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1999-09-15

2000-11-21

Elms, Richard

Static information storage and retrieval

Read/write circuit

Bad bit

3652257, G11C 700

Patent

active

061512591

ABSTRACT:
A semiconductor memory device having a column redundancy circuit is operated normally even if the number of bits used for inputting and outputting is great. The semiconductor memory device is composed of memory-cell columns each having two or more memory cells, a redundancy memory-cell column, input-output lines, switches mounted so as to correspond to the input-output lines and adapted to connect, in response to a control voltage, either of memory-cell columns adjacent to each other to the corresponding input-output line, fuses which are connected in series and to one terminal of which a supply voltage Vcc is applied and the other terminal of which is held at a ground potential GND and wherein a voltage at a point of connection between these fuses is supplied, as a control voltage, to the switches, and control voltage holding circuits which hold the control voltage applied to the switch at a "high" or "low".

REFERENCES:
patent: 4672240 (1987-06-01), Smith et al.
patent: 5715202 (1998-02-01), Harima

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