Method of fabricating gate

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation

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H01L 214763

Patent

active

061502510

ABSTRACT:
A method for fabricating a gate. A gate oxide layer is formed on a substrate. A first doped polysilicon layer is formed on the gate oxide layer. A second doped polysilicon layer on the first doped polysilicon layer. A third doped polysilicon layer over the second polysilicon layer. The second doped polysilicon layer has a grain size larger than a grain size of both the first doped polysilicon layer and the third dope polysilicon layer.

REFERENCES:
patent: 5652156 (1997-07-01), Liao et al.
patent: 5710454 (1998-01-01), Wu
patent: 5723356 (1998-03-01), Tsukamoto
patent: 5930612 (1999-07-01), Ito

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