Fishing – trapping – and vermin destroying
Patent
1992-10-05
1994-06-14
Kunemund, Robert
Fishing, trapping, and vermin destroying
437 52, 437919, H01L 2170, H01L 2700
Patent
active
053209761
ABSTRACT:
A method for manufacturing a VLSI semiconductor memory device, in which a cell transistor is formed in the cell array section of a semiconductor substrate, successively, a cell capacitor. Then, a transistor is formed in the periphery circuit section of the substrate. Therefore, access transistors of the cell array section are formed independently from transistors of the peripheral circuit section, optimizing transistor performance.
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Wolf et al. "Silicon Processing for the VLSI Era", vol. 1, Lattice Press, 1986, pp. 182-185.
Chin Dae-Je
Park Young-woo
Kunemund Robert
Samsung Electronics Co,. Ltd.
Tsai H. Jey
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