Semiconductor device having gaseous isolating layer formed in in

Details Semiconductor device having gaseous isolating layer formed in in Semiconductor device having gaseous isolating layer formed in in

1996-05-10

1999-01-19

Everhart, Caridad

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257300, 257315, 257314, 438683, H01L 21764, H01L 2708, H01L 2951

Patent

active

058616535

ABSTRACT:
An inter-level insulating structure is formed by a lower silicon oxide layer, an upper silicon oxide layer and an air layer filling a gap between the lower silicon oxide layer and the upper silicon oxide layer, and the air layer decreases the effective dielectric constant so that a parasitic capacitance across the inter-level insulating structure is drastically decreased.

REFERENCES:
patent: 4987101 (1991-01-01), Kaanta et al.
patent: 5328868 (1994-07-01), Conti et al.
patent: 5413962 (1995-05-01), Lur et al.
patent: 5670828 (1997-09-01), Cheung et al.
patent: 5770507 (1998-06-01), Chen et al.

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