Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1996-12-04
1999-03-30
Trammell, James P.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
395707, 395708, 711109, 711202, 711209, G06F 944
Patent
active
058900004
ABSTRACT:
A method and device for optimizing a compiler involves cooperation between the global and local register allocators in assigning symbolic registers to hardware registers. A large procedure may have many associated symbolic registers; the invention involves partitioning the symbolic registers into at least two portions, and allowing the global register allocator to assign one portion and the local register allocator to assign another portion. The registers may be partitioned based on different criteria, such as local vs. global registers, or spill costs, or shallow vs. nested regions.
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Aizikowitz Nava E.
Bar-Haim Roy N.
Edelstein Orit
Prosser Edward Curtis
Roediger Robert Ralph
Gamon Owen J.
International Business Machines - Corporation
Musgrove Jack V.
Nguyen Cuong H.
Trammell James P.
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