Multiprocessing interrupt controller on I/O bus

Details Multiprocessing interrupt controller on I/O bus Multiprocessing interrupt controller on I/O bus

1996-05-17

1998-07-07

Harvey, Jack B.

395308, G06F 300

Patent

active

057782369

ABSTRACT:
A multiprocessing computer system which includes an interrupt controller coupled to an expansion bus. The programmable interrupt controller has multiple storage locations at the same address for multiple CPUs. The CPUs are coupled to a host bus which in turn is coupled to the expansion bus by means of a bus bridge. An arbiter is coupled to the host bus for arbitrating bus mastership amongst the CPUs. CPU host owner identification for access to the storage locations is transferred across bus bridge to the programmable interrupt controller synchronized with the buffered address and data.

REFERENCES:
patent: 4271468 (1981-06-01), Christensen et al.
patent: 4495569 (1985-01-01), Kagawa
patent: 4862354 (1989-08-01), Fiacconi et al.
patent: 4967342 (1990-10-01), Lent et al.
patent: 5099414 (1992-03-01), Cole et al.
patent: 5125093 (1992-06-01), McFarland
patent: 5283904 (1994-02-01), Carson et al.
patent: 5317747 (1994-05-01), Mochida et al.
patent: 5481725 (1996-01-01), Jayakumar et al.
patent: 5506997 (1996-04-01), Maguire et al.
patent: 5535341 (1996-07-01), Shah et al.
patent: 5555430 (1996-09-01), Gephardt et al.
patent: 5590338 (1996-12-01), Parks et al.
patent: 5613128 (1997-03-01), Nizar et al.
patent: 5619706 (1997-04-01), Young
patent: 5623674 (1997-04-01), Pedrizetti
patent: 5627962 (1997-05-01), Goodrum et al.
Intel MultiProcessor Specification, Version 1.1, Apr. 1994, pp. i-vi; 1-1-5-6;A-1-C-1; Glossary 1-2.
Russo, Andrew P., "The AlphaServer 2100 I/O Subsystem," Digital Technical Journal, vol. 6, No. 3, Summer 1994, pp. 20-28.

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