Dynamic random access memory

Details Dynamic random access memory Dynamic random access memory

1991-12-26

1994-02-15

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Testing

36523006, G11C 700

Patent

active

052873129

ABSTRACT:
A dynamic random access memory according to the present invention comprises a plurality of dynamic memory cells arranged in rows and columns, a word line connected to the memory cells on the same row, a bit line connected to the memory cells on the same column, a word line selecting circuit having a word line selecting function of selecting an arbitrary one of the rows in response to an internal address signal, a word line driving voltage source, a word line driving circuit having at least one driving MOS transistor connected between the word line driving voltage source and the word line, for driving the word line in response to an output signal of the word line selecting circuit, and a control circuit for, in response to a voltage stress test control signal input from outside, controlling the word line driving circuit so that the word line driving circuit drives word lines more than those selected in a normal operation mode upon receiving an external address signal.

REFERENCES:
patent: 4651304 (1987-03-01), Takata
patent: 4654849 (1987-03-01), White
patent: 4751679 (1988-06-01), Dehganpour
patent: 4873669 (1989-10-01), Furutani
patent: 4969124 (1990-11-01), Luich
patent: 4999813 (1991-03-01), Ohtsuka
patent: 5157629 (1992-10-01), Sato

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