Memory device including two-valued/n-valued conversion unit

Static information storage and retrieval – Read/write circuit

Patent

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365168, G11C 1300

Patent

active

052873056

ABSTRACT:
A memory device comprises a memory cell array including a plurality of memory cells for storing n-valued data, an unit for converting a binary logic data applied thereto into an n-valued logic data when the binary logic data is written into the memory cell array, and an unit for converting an n-valued logic data into a binary logic data when the n-valued logic data is read out from the memory cell array.

REFERENCES:
patent: 4024512 (1977-05-01), Amelio et al.

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