Semiconductor-on-insulator device interconnects

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257 69, 257338, 257347, 257352, 257353, 257369, 257377, H01L 2712, H01L 2904, H01L 31062, H01L 310392

Patent

active

055875971

ABSTRACT:
A process for developing conductive interconnect regions between integrated circuit semiconductor devices formed on an insulating substrate utilizes the semiconductor material itself for formation of device interconnect regions.
A patterned layer of semiconductor material is formed directly on the surface of an insulating substrate. The patterned layer includes regions where semiconductor devices are to be formed and regions which are to be used to interconnect terminals of predetermined ones of the semiconductor devices. After forming the semiconductor devices in selected regions of the semiconductor material, the regions of the semiconductor material patterned for becoming interconnects are converted to a metallic compound of the semiconductor material.

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Parker et al. "Lattice Images of Defect-Free Silicon on Sapphire Prepared Ion Implantation", Applied Physics Letters, vol. 47, No. 6, Sep. 15, 1985, pp. 626-628.

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