Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1996-09-20
1998-08-04
Tran, Minh-Loan
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257399, 257400, 257509, H01L 2976
Patent
active
057897891
ABSTRACT:
A manufacturing method for a semiconductor device is disclosed for effecting improvement of voltage resistance between an N-well and N-type diffusion layer without adversely affecting circuit and transistor characteristics. At the time of forming an N-well, a side wall composed of nitride layer is formed on the oxide layer that is used as a mask in phosphorus implantation, and the N-well is formed using as a mask the oxide layer on which this side wall is provided. The side wall is then removed, boron is implanted, and a channel stopper is formed only between the N-well and N-type diffusion layer. A channel stopper between N-type diffusion layers is formed subsequently as a separate step. In this way, the concentration of the channel stopper between the N-well and N-type diffusion can be set to a concentration different from that of the channel stopper between N-type diffusion layers.
REFERENCES:
patent: 5359221 (1994-10-01), Miyamoto et al.
Toshiyuki Nishihara et al, A 0.5.mu.m Isolation Technology Using Advanced Poly Silicon Pad LOCOS (APPL), 1988, IEEE, pp. 100-103.
NEC Corporation
Tran Minh-Loan
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