Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1997-01-02
1998-08-04
Crane, Sara W.
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257315, 257316, 257319, 257320, 257321, 257365, 36518503, 3651851, 36518514, H01L 2976
Patent
active
057897778
ABSTRACT:
The non-volatile memory has a storage cell complying with multi-bit data by means of a double layered floating gate architecture. The cell comprises: source 2 and drain 3 which are distant from each other along a direction L in a semiconductor substrate 1; a single first floating gate 4A which is provided between the source and the drain and above a principal plane of the semiconductor substrate and extends along a direction crossing the direction L; a control gate 5 which is placed between the drain ad source and above a principal plane of the first floating gate; high impurity concentration layers 21, 22 which are isolated from the source and drain in the semiconductor substrate; a plurality of second floating gates 4B.sub.1, 4B.sub.2 which respectively extend across the first floating gate and above a principal plane of the first floating gate and extend from a position different than either of the source and the drain up to a position above a principal plane of the high impurity concentration layer; and a plurality of program gates 6.sub.1, 6.sub.2 which are placed correspondingly above principal planes of the second floating gates.
REFERENCES:
patent: 5111257 (1992-05-01), Andoh et al.
patent: 5282161 (1994-01-01), Villa
patent: 5517044 (1996-05-01), Koyama
patent: 5633518 (1997-05-01), Broze
Crane Sara W.
Dover Rennie William
Motorola Inc.
Wille Douglas A.
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