Static information storage and retrieval – Read/write circuit – Testing
Patent
1990-08-29
1992-11-17
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Testing
36518907, G11C 700
Patent
active
051649187
ABSTRACT:
An integrated circuit having a memory capable of being tested protects data stored in the memory from being read out of the integrated circuit during testing. Data input during memory testing is internally compared with data stored in the memory. The integrated circuit also outputs the accumulated comparison results. The output comparision result also may differ from the data in timing. An input unit includes an external terminal and a plurality of buffers for controlling data input and output to and from the integrated circuit.
REFERENCES:
patent: 4905142 (1990-02-01), Matsubara et al.
Imai Shigeki
Ogino Eiji
Wada Masahiko
Popek Joseph A.
Sharp Kabushiki Kaisha
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