Method of manufacturing multilevel metal interconnect

Details Method of manufacturing multilevel metal interconnect Method of manufacturing multilevel metal interconnect

Filed on

1998-12-15

Date issued

2000-04-11

Examiner

Powell, William

Patent Class

Semiconductor device manufacturing: process

SubClass

Chemical etching

SubSubClass

Combined with the removal of material by nonchemical means

Other Related Categories

438745, H01L 2100

Type

Patent

Status

active

Patent number

060487968

Description

ABSTRACT:
A method is described for manufacturing a multilevel metal interconnects. The method comprises the steps of providing a substrate and then forming a wire on the substrate. A dielectric layer is formed on the substrate and the wire and a protective layer is formed on the dielectric layer. An opening is formed by patterning the protective layer and the dielectric layer and a barrier layer is formed on the protective layer and in the opening. A copper layer is formed on the barrier layer and fills the opening. A portion of the copper layer and the barrier layer are removed by chemical-mechanical polishing.

REFERENCES:
patent: 5960317 (1999-09-01), Jeong et al.
patent: 6001730 (1999-12-01), Farkas et al.

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