Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1995-10-11
1999-10-05
Martin-Wallace, Valencia
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257527, 257618, 257628, H01L 2976, H01L 2994
Patent
active
059628928
ABSTRACT:
A source and drain diffusion layer of a transistor has a junction of a shallow depth and low in parasitic resistance and parasitic capacitance.
The transistor includes a gate insulator formed on a principal plane of a semiconductor substrate, a gate electrode formed on the gate insulator, and source and drain diffusion layers of one conductivity type formed on the principal plane of the semiconductor substrate across the gate electrode. A semiconductor thin film layer doped with an impurity of the same conductivity type is selectively deposited on the principal plane of the semiconductor substrate on which the source and drain diffusion layers are formed. A facet face is formed at an end portion of the semiconductor thin film which opposes to a sidewall of the gate electrode. The facet face has an inclination angle between a sidewall face of the gate electrode and the principal plane of the semiconductor substrate.
REFERENCES:
Kinya Goto et al, "A Novel Fabrication Method for Short Channel MOSFET's Using Self-Aligned Ultrashallow Junction Formation by Selective Si.sub.1-x Ge.sub.x CVD", Extended Abstracts of the 1994 International Conference on Solid State Devices and Materials, Yokohama, 1994, pp. 999-1000.
Hideki Shibata et al, "High Performance Half-Micron PMosfets with 0.1um Shallow P.sup.+ N Junction Utilizing Selective Silicon Growth and Rapid Thermal Annealing", 1987 IEEE, pp. 590-593.
Carlos Mazure et al, "Facet Engineered Elevated Source/Drain by Selective Si Epitaxy for 0.35 Micron Mosfets", 1992 IEEE, pp. 853-856.
Martin-Wallace Valencia
NEC Corporation
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