Method and device for acquiring redundancy information from a pa

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

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Other Related Categories

714 25, H02H 305

Type

Patent

Status

active

Patent number

061016187

Description

ABSTRACT:
A method and circuit for testing a packaged semiconductor memory device allow the acquisition of information on redundant elements by performing one of three possible redundancy rollcall tests on the packaged memory chip. By stimulating the packaged device's pins, the memory chip is set in one of the three test modes. In the first test mode, a preset signal indicating redundancy is sensed and the state of an output pin is changed. In the second test mode, memory array rows are sequentially addressed and the state of an output pin is changed when a redundant row is addressed. In the third test, array columns are sequentially addressed and, when a redundant column is addressed, the state of the output pin to which the redundant column is mapped is changed.

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P. Mazumder et al., "Parallel Testing Pattern-Sensitive Faults in Semiconductor Random-Access Memories," IEE Trans. on Computers, vol. 38, No. 3, Mar. 1989, pp. 394-407.

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