Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral adapting
Patent
1998-02-06
2000-08-08
Lee, Thomas C.
Electrical computers and digital data processing systems: input/
Input/output data processing
Peripheral adapting
327103, 341 57, 341126, 341141, 341155, 710 69, G06F 1340, H03M 516
Patent
active
06101561&
ABSTRACT:
A method and circuit, for use with a parallel data bus of defined width, which provide a parallel data transmission and reception rate which is greater than the defined width of the parallel data bus. With respect to improving transmission, provided is a width-reduction circuit element, having at least two inputs through which are received a first set of parallel digital data signals and having one or more outputs through which are transmitted a second set of parallel digital data signals where the second set is both smaller than the first set and representative of the information contained within the first set. The one or more outputs interface with a parallel connector which is sufficient to form an operable connection with the parallel data bus of defined width. With respect to improving reception, provided is a width-expansion circuit element having one or more inputs through which are received a second set of parallel digital data signals and having at least two outputs through which are transmitted a first set of parallel digital data signals where the first set is both larger than the second set and representative of information encoded within the second set. The one or more inputs interface with a parallel connector sufficient to form an operable connection with the parallel data bus of defined width.
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Beers Gregory Edward
Frankeny Richard Francis
Smadi Mithkal Moh'd
Dillon Andrew J.
International Business Machines - Corporation
Lee Thomas C.
Park Ilwoo
Salys Casimer K.
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