Triple well charge pump

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Patent

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Details

257371, H01L 2972

Patent

active

061005576

DESCRIPTION:

BRIEF SUMMARY
FIELD OF THE INVENTION

The present invention relates to charge pump circuits, and more particularly to using triple well transistors in the design of charge pump circuits.


BACKGROUND OF THE INVENTION

A charge pump is a circuit that can generate an output voltage that is higher than the voltage supplied to the charge pump. One of the applications of charge pumps is to develop voltage for erasing and programming some kinds of nonvolatile semiconductor memory devices, such as electrical erasable programmable read only memory (EEPROM) and flash memory. One way to operate these memory devices is to program through hot electron injection and erase through Fowler-Nordheim tunneling. The programming and erasing of such a memory cell require current to pass through the dielectric surrounding a floating gate electrode. As a result, a high voltage is generally needed. Some prior art nonvolatile semiconductor memory devices require the application of an external high voltage (e.g, 12 volts) in addition to a regular 5 volts supply voltage. This arrangement is undesirable because it is complicated and wastes real estate on circuit boards. Recently, many nonvolatile semiconductor memory device manufacturers place charge pumps on chip so as to develop the required high voltage for erasing and programming. Many customers welcome this development, and the sale of nonvolatile semiconductor devices increases.
As the number of memory cells in a nonvolatile semiconductor memory device increases, the current required to erase and program these cells also increases. As a result, there is a need for the charge pump to be efficient, e.g., generating more current and at a faster rate.


SUMMARY OF THE INVENTION

The present invention relates to using triple well transistors to increase the efficiency of a charge pump. The inventive charge pump comprises a plurality of pumping transistors arranged to increase the voltage level, or push the voltage lend to a negation valve, from a first pumping transistor to a last pumping transistor in response to clock pulses applied to these pumping transistors. At least one of the plurality of pumping transistors has a source and a drain region of a first conductivity type formed on a first well having an opposite conductivity type.
A second well having the first conductivity type can be formed outside of the first well. The second well is fabricated on a substrate. This transistor design is commonly referred to as a "triple well" transistor. The source region, first well and the second well are preferably set to substantially the same potential. In one embodiment of the present invention, the second well can be set to the highest positive potential of the charge pump.
One aspect of this configuration is that the first well forms a semiconductor diode with the drain region. This diode allows more current to flow through the pumping transistor, when compared with a pumping transistor of conventional construction. Another aspect of this arrangement is that it reduces the body effect of the triple well transistor. As a result, the threshold voltage of the transistor is reduced. The reduction in threshold voltage allows the transistor to be turned on faster.
It is found that the above mentioned diode and threshold voltage reduction effects, singly and in combination, allow the charge pump to operate more efficiently. Examples of the improved efficiency include increasing the output current, lowering the power supply voltage level, and increasing the operating frequency.
The triple well pumping transistor of the present invention can be used in positive voltage and negative voltage charge pumps.
These and other features of the present invention will become apparent from the following detailed description of the invention read in conjunction with the accompanying drawings.


BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic diagram of a four-stage charge pump of the present invention.
FIG. 2 shows timing diagram of clock signals pulses that can be used with the charge pump of FIG. 1.
FIG. 3 s

REFERENCES:
patent: 5394365 (1995-02-01), Tsukikawa
patent: 5489870 (1996-02-01), Arakawa
patent: 5502629 (1996-03-01), Ito et al.
patent: 5612921 (1997-03-01), Chang et al.

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