Electronic digital logic circuitry – Multifunctional or programmable – Array
Patent
1994-03-01
1995-03-21
Hudspeth, David R.
Electronic digital logic circuitry
Multifunctional or programmable
Array
326121, H03R 19094
Patent
active
053999240
ABSTRACT:
A low power optional inverter uses P-channel and N-channel transistors in series as in a conventional CMOS inverter, but in one embodiment connects complementary signals to the sources of the P-channel and N-channel transistors such that when the complementary signals are switched the circuit switches between an inverting and a non-inverting buffer. In some embodiments P-channel and/or N-channel pass transistors are used in the non-inverting mode to avoid the threshold voltage drop associated with a CMOS non-inverting buffer. In another embodiment, in the noninverting mode, at least one bypass transistor is turned on and power is not supplied to the inverter. In yet another embodiment, in the inverting mode a CMOS inverter is powered with conventional voltages and in the noninverting mode the CMOS inverter is disabled and a bypass transistor connects input to output.
REFERENCES:
patent: 4567385 (1986-01-01), Falater et al.
patent: 5331226 (1994-07-01), Goetting
Goetting F. Erich
Schultz David P.
Hudspeth David R.
Xilinx , Inc.
Young Edel M.
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