Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1999-09-15
2000-08-08
Niebling, John F.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438637, 438638, 438660, 438666, 438668, 438678, 438632, 438633, 438628, H01L 2144
Patent
active
061001961
ABSTRACT:
A method for making copper interconnections in an integrated circuit is described. The structure is a damascene copper connector whose upper surface is coplanar with the upper surface of the insulating layer in which it is embedded. Out-diffusion of copper from the connector is prevented by two barrier layers. One is located at the interface between the connector and the insulating layer while the second barrier is an insulating layer which covers the upper surface of the connector. The damascene process involves filling a trench in the surface of the insulator with copper and then removing the excess by chem.-mech. polishing. Since photoresist is never in direct contact with the copper the problem of copper oxidation during resist ashing has been effectively eliminated.
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Sub-Half Micron Copper Interconnects using Reflow of Sputtered Copper Films, by Kazuhide Abe et al., Jun. 27-29, 1995 VMIC conference proceedings, pp. 308-314.
Chan Lap
Zheng Jia Zhen
Chartered Semiconductor Manufacturing Ltd.
Cooper Kent J.
Gurley Lynne
Niebling John F.
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