Semiconductor floating gate device having improved channel-float

Details Semiconductor floating gate device having improved channel-float Semiconductor floating gate device having improved channel-float

1991-12-10

1993-11-09

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257322, 257402, 365185, H01L 2968, G11C 1134

Patent

active

052605930

ABSTRACT:
Described is an E.sup.2 PROM design comprising a channel region and a floating gate comprising P-type polycrystalline silicon. The work function difference between P-type material effectively increases the threshold voltage of the transistor. This alleviates the need for a boron V.sub.T adjust implant. Implants of material such as boron to set the threshold voltage are known to correlate with problems such as implant ionization and junction (avalanche) breakdown. These two undesired effects can be decreased or eliminated in devices comprising the invention. An optional phosphorous implant into the substrate would allow the lowering of V.sub.T to a desired level.

REFERENCES:
patent: 4745079 (1988-05-01), Pfiester
patent: 4794433 (1988-12-01), Kamiya et al.
patent: 4816883 (1989-03-01), Baldi
"Physics of Semiconductor Devices", 1981, by John Wiley & Sons, Inc. by S. M. Sze, ISBN 0-471-05661-8.

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