Static information storage and retrieval – Read/write circuit – Testing
Patent
1994-12-29
1995-11-21
Nguyen, Viet Q.
Static information storage and retrieval
Read/write circuit
Testing
371 24, 371 211, 3241581, G11C 700, G01R 3126, H01L 2166
Patent
active
054693942
ABSTRACT:
An object of the present invention is to provide a semiconductor device that permits easy and efficient testing. A nonvolatile semiconductor memory comprises word lines WLi and bit lines BLi, a memory cell matrix 17 consisting of nonvolatile memory cells Cij, a sense amplifier 15, a write/erase timing circuit 9 for performing timing control necessary for write and erase operations, and a status register 2 for storing the operating state of the memory at the completion of the operation of the circuit 9, wherein there are provided, outside the address of the memory cell matrix 17, two kinds of dummy cells, D1, D2, D3, . . . , whose values are fixed to different values that induce different outputs from the sense amplifier 15. A pass condition or a fail condition is generated by accessing the dummy cells.
REFERENCES:
patent: 4379259 (1983-04-01), Varadi et al.
patent: 4607219 (1986-08-01), Isosaka
patent: 5219765 (1993-06-01), Yoshida et al.
patent: 5287313 (1994-02-01), Okajima
patent: 5298433 (1994-03-01), Furuyama
patent: 5337279 (1994-08-01), Gregory et al.
patent: 5402380 (1995-03-01), Kumakura et al.
Kasa Yasushi
Kumakura Sinsuke
Watanabe Hisayoshi
Yamazaki Hirokazu
Fujitsu Limited
Nguyen Viet Q.
LandOfFree
Nonvolatile semiconductor memory device having a status register does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Nonvolatile semiconductor memory device having a status register, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Nonvolatile semiconductor memory device having a status register will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1143140