Method of making a semiconductor memory device

Details Method of making a semiconductor memory device Method of making a semiconductor memory device

1992-06-30

1994-01-18

Thomas, Tom

Fishing, trapping, and vermin destroying

437 47, 437 48, 437 60, H01L 2170

Patent

active

052799832

ABSTRACT:
A semiconductor memory device includes a cell array region and a peripheral circuit region, wherein a channel is formed to surround the cell array region, on a border region between the cell array region and peripheral circuit region. Also, a method for the semiconductor memory device is provided. Therefore, the conventional problem of degraded reliability of the conductive layer due to the step between the cell array region and peripheral circuit region, can be prevented. At the same time, the surface planarization of the peripheral circuit region can be attained.

REFERENCES:
patent: 4882289 (1989-11-01), Moriuchi et al.
patent: 5171713 (1992-12-01), Matthews
Kawanago, et al., "3-Dimensional Stacked Capacitor-Cell for 16M and 64M Drams", IEDM 1988, pp. 592-595.
Inoue, et al., "A New Stacked Capacitor Cell With Thin Box Structured Storage Node", Extended Abstracts of the 21st Conference on Solid State Devices and Materials, Tokyo, 1989, pp. 141-144.
Inoue, et al., "A Spread Stacked Capacitor (SSC) Cell for 64MBIT Drams", IEDM, 1989, pp. 31-34.
Wakamiya, et al., "Novel Stacked Capacitor Cell For 64Mb Dram", LSI R&D Laboratory, Mitsubishi Electric Corp., pp. 69-70.

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