Testable programmable gate array and associated LSSD/determinist

Details Testable programmable gate array and associated LSSD/determinist Testable programmable gate array and associated LSSD/determinist

1995-12-12

1999-02-02

DeCady, Albert

Excavating

39518306, G01R 3128

Patent

active

058675078

ABSTRACT:
A programmable gate array includes test subsystems for testing various functional subsystems of the programmable gate array. A sequence of test methods, employing the test subsystems, test the functionality of the programmable gate array, taking into account the interdependencies of the various subsystems and accordingly enabling fault isolation therein.

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Eichelberger, E. & Williams, T., "A Logic Design Structure for LSI Testability," The Proceedings of the 14th Design Automation Conference, 1977, pp. 206-211.

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