Threshold optimization for soi transistors through use of negati

Fishing – trapping – and vermin destroying

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437 37, 437 21, 437 43, H01L 21265

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053875303

ABSTRACT:
Threshold optimization for SOI transistors is achieved through the formation of a layer of charge within the gate oxide, which layer has a polarity corresponding to that of the ion implantation for threshold voltage control. A negative charge layer is formed by furnishing trace amounts of aluminum on the substrate before growth of an oxide to form a portion of the gate oxide. The aluminum will form a charge layer on the surface of the oxide and an additional oxide is then deposited on the same to form the gate oxide as a sandwich with the charge layer in the same.

REFERENCES:
patent: 3328210 (1967-06-01), McCaldin et al.
patent: 3624466 (1971-11-01), Schnable
patent: 3787251 (1974-01-01), Brand et al.
patent: 3849204 (1974-11-01), Fowler
patent: 3852120 (1974-12-01), Johnson et al.
patent: 3933530 (1976-01-01), Mueller et al.
patent: 4047974 (1977-09-01), Harari
patent: 4566173 (1986-01-01), Gossler et al.
patent: 4804640 (1989-02-01), Kaganowicz et al.
patent: 5231045 (1993-07-01), Miura et al.
patent: 5264721 (1993-11-01), Gotou
Wolf et al., vol. I & II, Silicon Processing for the VLSI Era, Latice Press 1986.
Wolf, S. "Silicon Processing for the VLSI ERA", Lattice Press, Sunset Beach, Calif., vol. 2 1990.

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