Semiconductor memory device for performing parallel operations o

Details Semiconductor memory device for performing parallel operations o Semiconductor memory device for performing parallel operations o

1993-09-02

1995-01-31

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Differential sensing

365207, 365 51, 36523001, 36523003, G11C 700, G11C 1140

Patent

active

053863941

ABSTRACT:
The semiconductor device has more-significant global data lines and less-significant data lines hierarchically formed, and switches for controlling the more-significant global data lines and the less-significant data lines to be connected each other. In addition, the semiconductor device has the unit for precharging the global data lines independently of the data lines.

REFERENCES:
patent: 4777625 (1988-10-01), Sakui
patent: 4819207 (1989-04-01), Sakui
patent: 4888732 (1989-12-01), Inoue
patent: 5051954 (1991-09-01), Toda
patent: 5060230 (1991-10-01), Arimoto
patent: 5245570 (1993-09-01), Fazio
patent: 5274598 (1993-12-01), Fujii

Affiliated with

Also associated with

Rating

Semiconductor memory device for performing parallel operations o does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device for performing parallel operations o, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device for performing parallel operations o will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1106540