Stacked integrated circuits

Static information storage and retrieval – Interconnection arrangements

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365 52, 257686, 257673, 438613, G11C 506

Patent

active

061221872

ABSTRACT:
System modules are described which include a stack of interconnected semiconductor dies. The semiconductor dies are interconnected by micro bump bonding of coaxial lines that extend through the thickness of the various dies. The coaxial lines also are selectively connected to integrated circuits housed within the dies. In one embodiment, a number of memory dies are interconnected in this manner to provide a memory module.

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