Semiconductor device having SOI structure and manufacturing meth

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257347, 257350, 257351, 257398, 257400, H01L 2701, H01L 2712, H01L 2976

Patent

active

056545738

ABSTRACT:
A semiconductor device having an SOI structure which involves no parasitic MOS transistor and substrate floating effect and has a planar element isolation region and, a manufacturing method therefor. In the semiconductor device, a field shield gate composed of an oxide film and a field shield gate electrode is formed to be buried under an SOI layer. As a result, it is possible to prevent generation of a parasitic transistor and substrate floating effects inherent in field shield gate while obtaining a planar element isolation structure.

REFERENCES:
patent: 5324960 (1994-06-01), Pfiester et al.
patent: 5440161 (1995-08-01), Iwamatsu et al.
A.H. Hamdi, et al, "Novel SOI CMOS Design Using Ultra Thin Near Intrinsic Substrate," 1982 IEDM, pp. 107-110.

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