Channel etch type bottom gate semiconductor device

Details Channel etch type bottom gate semiconductor device Channel etch type bottom gate semiconductor device

1998-09-22

2000-09-19

Ngo, Ngan V.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257344, 257353, 257408, H01L 310392, H01L 2701, H01L 2712, H01L 2976, H01L 2994

Patent

active

061216607

ABSTRACT:
In a bottom gate type semiconductor device made of a semiconductor layer with crystal structure, source/drain regions are constructed by a lamination layer structure including a first conductive layer (n.sup.+ layer), a second conductive layer (n.sup.- layer) having resistance higher than the first conductive layer, and an intrinsic or substantially intrinsic semiconductor layer (i layer). At this time, the n.sup.- layer acts as LDD region, and the i layer acts as an offset region is a film thickness direction.

REFERENCES:
patent: 5643826 (1997-07-01), Ohtani et al.
patent: 5825050 (1998-10-01), Hirakawa
patent: 5828082 (1998-10-01), Wu
patent: 5936278 (1999-08-01), Hu et al.
"Fabrication of Low-Temperature Bottom-Gate Poly-Si TFTs on Large-Area Substrate by Linear-Beam Excimer Laser Crystallization and Ion Doping Method" H. Hayashi et al., IEDM95, pp. 829-832, 1995.

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