Semiconductor memory device having multilayer group IV nanocryst

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257 9, 257 12, 257 14, 257 15, 257 17, 257 20, 257 24, 257 30, 257314, 257315, 257317, 438197, 438201, 438257, 438264, 438962, H01L 29788, H01L 2906, H01L 2915, H01L 21336

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060607432

ABSTRACT:
The semiconductor device comprises a first insulating layer formed on the semiconductor substrate, at least one double-deck semiconductor nanocrystal formed on the first insulating layer, the at least one double-deck semiconductor nanocrystal comprising a first semiconductor nanocrystal and a second semiconductor nanocrystal stacked one upon the other via a second insulating layer, and a third insulating layer selectively formed on the first insulating layer so as to cover the at least one double-deck semiconductor nanocrystal.

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Guo et al., Si Single Electron MOS Memory with Nanoscale Floating Gate and Narrow Channel, IEDM 1996 pp955,956.
A. Nakajima et al., "Room temperature operation of Si single-electron with self-aligned floating dot gate", Appl. Phys. Lett., 70(13):1742-1744 (1997).
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S. Tiwari et al., "A silicon nanocrystals based memory", Appl. Phys. Lett., 68(10):1377-1379 (1996).

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