Method of making an interconnect structure

Details Method of making an interconnect structure Method of making an interconnect structure

1997-02-14

2000-05-09

Niebling, John F.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438640, 438645, 438643, 438700, 438952, H01L 214763, H01L 21311

Patent

active

060603852

ABSTRACT:
The present invention comprises a metallization method that forms a three-level interconnect in an electrical circuit. The method comprises providing a substrate assembly and depositing thereon a first dielectric layer thereover. A second dielectric layer is then deposited over the first dielectric layer. The second dielectric layer is patterned and anisotropically etched to form contact corridors. The second dielectric layer is again patterned and etched to form trenches, some of which are immediately above the contact corridors. An electrically conductive material is deposited to fill the contact corridors and trenches, and to leave a portion of the electrically conductive material above the second dielectric layer and directly above both the contact corridors and the trenches. The deposition forms a unitary three-level interconnect having a contiguous trench below a contact corridor below a metal line, where the metal line is above the second dielectric layer. An optional antireflective coating can be deposited to assist in filling the trenches and contact corridor. Finally, patterning and etching of the electrically conductive material above the second dielectric layer forms metal lines for the electrical circuit.

REFERENCES:
patent: 4920070 (1990-04-01), Mukai
patent: 5298463 (1994-03-01), Sandhu et al.
patent: 5510294 (1996-04-01), Dixit et al.
patent: 5525542 (1996-06-01), Maniar et al.

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